• Journal of Internet Computing and Services
    ISSN 2287 - 1136 (Online) / ISSN 1598 - 0170 (Print)
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Implementation of high performance parallel LU factorization program for multi-threads on GPGPUs


Bong-Hi Shin, Young-Tae Kim, Journal of Internet Computing and Services, Vol. 12, No. 3, pp. 131-138, Jun. 2011
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Keywords: GPGPU, CUDA, LU, SIMT

Abstract

GPUs were originally designed for graphic processing, and GPGPUs are general-purpose GPUs for numerical computation with high performance and low electric power. In this paper, we implemented the parallel LU factorization program for GPGPUs. In CUDA, which is computational environment for Nvidia GPGPUs, domains are divided into blocks, and multi-threads compute each sub-blocks Simultaneously. In LU factorization program, computation order should be artificially decided due to the data dependence. To resolve the data dependancy, we suggested a parallel LU program for GPGPUs, and also explained parallel reduction algorithm for partial pivoting of LU factorization. We finally present performance analysis to show efficiency of the parallel LU factorization program based on multi-threads on GPGPUs.


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Cite this article
[APA Style]
Shin, B. & Kim, Y. (2011). Implementation of high performance parallel LU factorization program for multi-threads on GPGPUs. Journal of Internet Computing and Services, 12(3), 131-138.

[IEEE Style]
B. Shin and Y. Kim, "Implementation of high performance parallel LU factorization program for multi-threads on GPGPUs," Journal of Internet Computing and Services, vol. 12, no. 3, pp. 131-138, 2011.

[ACM Style]
Bong-Hi Shin and Young-Tae Kim. 2011. Implementation of high performance parallel LU factorization program for multi-threads on GPGPUs. Journal of Internet Computing and Services, 12, 3, (2011), 131-138.